OrCAD FPGA System Planner

Device Family Support

• Artix-7
• Kintex-7
• Spartan-3
• Spartan-6 LX
• Virtex-4 LX
• Virtex-5 LX
• Virtex-6 LXT
• Virtex-7
• Zynq

The Cadence® OrCAD® FPGA System Planner provides a complete, scalable solution for FPGA-PCB co-design that allows users to create an optimum correct-by-construction pin assignment. FPGA pin assignment is synthesized automatically based on user-specified, interface-based connectivity (design intent), as well as FPGA pin assignment rules (FPGA-rules), and actual placement of FPGAs on PCB (relative placement).

Key Features

• Accelerates integration of FPGAs with OrCAD PCB design creation environments
• Eliminates unnecessary physical prototype iterations due to FPGA pin assignment errors
• Eliminates unnecessary, frustrating design iterations during the PCB layout process
• Reduces PCB layer count through placement aware pin assignment and optimization
• Scalable, cost-effective FPGA-PCB co-design solution from OrCAD to Cadence Allegro® GXL
• Shortens time for optimum initial pin assignment, accelerating PCB design schedules

Target Markets

• Broadcast
• Automotive
• High Performance Computing
• Consumer
• Aerospace & Defense
• Industrial Scientific Medical
• Industrial Scientific Medical
• Wired Communications
• Wireless Communications