Allegro Design Entry Capture / Capture CIS
Part Number:
Allegro Design Entry Capture / Capture CIS
Alliance Program Tier:
Member
Device Family Support
- Artix-7
- Kintex-7
- Spartan-3
- Spartan-6 LX
- Virtex-4 FX
- Virtex-5 LX
- Virtex-6 LXT
- Virtex-7
- Zynq
Cadence® Allegro® Design Entry Capture / Capture CIS provides fast and intuitive schematic design entry for PCB development or analog simulation using PSpice. The component information system (CIS) integrates with it to automatically synchronize and validate externally sourced part data.
Key Features
- Boosts schematic editing efficiency of complex designs through hierarchical and variant design capabilities
- Integrates with a robust CIS that promotes the use of preferred, current parts to accelerate the design process and reduce project costs
- Provides access to more than two million parts with Cadence ActiveParts, offering greater flexibility when choosing design components
Target Markets
- Broadcast
- Automotive
- High Performance Computing
- Consumer
- Aerospace & Defense
- Industrial Scientific Medical
- Industrial Scientific Medical
- Wired Communications
- Wireless Communications
Products and/or services provided by Alliance Program Members are sold or licensed solely by the Member and not Xilinx. Please be advised that Xilinx hereby disclaims any warranties, express or implied, including warranties of merchantability, fitness for a particular purpose, or noninfringement with respect to any such products and/or services.