UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Page Bookmarked

Virtex-7 FPGA Gen3 Integrated Block for PCI Express (PCIe)

Product Description

Xilinx provides a PCI Express Gen3 integrated block for PCI Express® (PCIe) in the Virtex®-7 XT and HT family of FPGAs. The Virtex-7 FPGA solution for PCI Express Gen3 includes all of the necessary components to create a complete solution for PCIe. Delivered through the IP Catalog, the Xilinx IP for Endpoint and Root Port simplifies the design process and reduces time-to-market.

This core combined with Xilinx Targeted Design Platforms, helps customers develop system solutions.

Key Features & Benefits

  • Compliant with the PCI Express Base Specification 3.0
  • Supported Lane width: x1, x2, x4 and x8
  • Fully compliant with PCI Express transaction ordering rules
  • Optimal buffering for high bandwidth Direct Memory Access (DMA) applications
  • Bandwidth scalability interconnect width
  • AXI4-Stream Interface

Featured Documents

Tools and Device Support

Device Family Support:

Design Tools Support:

Related Products

xilinx-131x43
  • Bundled With: Vivado Design Suite
  • License: Xilinx End User License Agreement

Featured Documents