The CORDIC IP implements a generalized coordinate rotational digital computer (CORDIC) algorithm, initially developed by Volder[1] to iteratively solve trigonometric equations, and later generalized by Walther[2] to solve a broader range of equations, including the hyperbolic and square root equations. The CORDIC IP implements the following equation types:
- Rectangular <-> Polar Conversion
- Trigonometric
- Hyperbolic
- Square Root
Features in v5.0:
- Supports Virtex®-7, Kintex®-7, Virtex-6 and Spartan®-6 device families
- Supports AXI4-stream interface
- Delivers VHDL demonstration testbench with CORE Generator
Features in v4.0:
- Supports Virtex-7, Kintex-7, Virtex-6, Virtex-5, Virtex-5, Virtex-4, Spartan-6, Spartan-3, and Spartan-3A device families
Features in v4.0 and v5.0:
- Supports many functional configurations: vector rotation (polar to rectangular), vector translation (rectangular to polar), Sin and Cos, Sinh and Cosh, Atan and Atanh, Square Root
- Supports inputs and outputs ranging from 8 to 48 bits wide.
- Provides control of the internal add-sub precision and the number of add-sub iterations
- Optional amplitude compensation for CORDIC algorithm's amplitude scale factor
- Supports multiple output rounding modes: Truncation, Round to Pos Infinity, Round to Pos/Neg Infinity and Round to Nearest Even
- Word Serial architectural configuration for small area and parallel architectural configuration for high throughput
- Instantaneous Resource Estimation
- For use with Xilinx CORE Generator™ and Xilinx System Generator
References
1. Volder, J., “The CORDIC Trigonometric Computing Technique” IRE Trans. Electronic Computing, Vol. EC-8, Sept. 1959, pp330-334
2. Walther, J.S., “A Unified Algorithm for Elementary Functions,” Spring Joint computer conf., 1971, proc., pp379-385