AEHF Turbo Convolutional Decoder

Documentation

• AEHF Turbo Convolutional Decoder

Device Family Support

• Virtex-II Pro
• Virtex-II

Requirements

• ISE 6.1.02i or later

The Advanced Extremely High Frequency (AEHF) TCC Decoder Core implements the Turbo convolutional code iterative decoding required for all AEHF SATCOM terminals, including SMART-T, SCAMP, FAB-T, NESP and all future AEHF compatible terminals.

Key Features

• Supports all required interleaver block sizes.
• Dynamic block-size switching without interruption supports multiple channels.
• Provides early termination option for reduced power consumption.
• Performs parallel processing with 8 SISOs to achieve high throughput.
• Programmable number of iterations dynamically changeable per block.
• Uses MAX-LOG-MAP algorithm with extrinsic scaling
• Achieves 50 Mbps decoded data rate with 10 iterations (135 MHz clock rate).
• Fully synchronous design with single-clock domain.
• Double-buffered input accommodates burst or continuous data.
• VHDL source code provided with self-checking test bench