3GPP LTE UL Channel Decoder
Part Number:
EF-DI-CHDEC-LTE-SITE
AXI Interface Support:
- AXI4
- AXI4-Stream
License:
Core License Agreement
Program:
LogiCORE
Design Tools Support:
- ISE Design Suite
- Vivado Design Suite
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Product Details
Documentation
Device Family Support
- Zynq-7000
- Artix-7
- Kintex-7 -2L
- Kintex-7
- Virtex-7
- Virtex-7 -2L
- Virtex-7 XT
- Virtex-6 -1L
- Virtex-6 HXT
- Virtex-6 CXT
- Virtex-6 LXT
- Virtex-6 SXT
- Virtex-5 FXT
- Virtex-5 LX
- Virtex-5 LXT
- Virtex-5 SXT
- Virtex-5 TXT
- Spartan-6 LX
- Spartan-6 LXT
The 3GPP LTE Channel Decoder provides a high-performance, optimized decode function for the Uplink Shared Channel (UL-SCH), as defined in 3GPP. Core Generator options allow the user to generate underlying transport block and channel quality information decode chains, supporting applications such as relay nodes. The 3GPP LTE Channel Decoder is a component in Xilinx LTE Baseband Targeted Design Platform.
Key Features
- Implements UL-SCH channel decode functions
- Supports FDD and TDD frame structures
- Compliant with 3GPP 36.212 v9.30
- AXI-4 Stream interface eases system integration
- Includes the LTE Turbo Decoder and Viterbi Decoder LogiCores
- Supports HARQ combining
- Bit accurate C model available with MEX function supporting integration with Matlab