IEEE 802.16e CTC Decoder
Part Number:
EF-DI-CTC-80216E-DEC-SITE
Program:
LogiCORE
Design Tools Support:
- ISE Design Suite
IEEE 802.16E CTC Decoder v4.0 available now.
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Product Details
Documentation
Device Family Support
- Virtex-6 HXT
- Virtex-6 CXT
- Virtex-6 LXT
- Virtex-6 SXT
- Virtex-5
- Virtex-4
- Spartan-6 LX
- Spartan-6 LXT
- Spartan-3A DSP
- Spartan-3
The IEEE 802.16e CTC Decoder Core performs iterative decoding of channel data that has been encoded as described in Section 8.4.9 of the IEEE Std 802.16e specification. The IEEE 802.16e code is a parallel concatenated convolutional code with an input data block of 2N bits. Through parallel processing with parameterizable number of SISOs (1 to 8) this LogiCORE™ IP is capable of achieving high throughput: decoded data rate exceeds 58 Mb/s with four iterations using four SISOs at 180-MHz clock frequency.
Key Features
- Supports all interleaver block sizes of the CTC OFDMA PHY mode including the H-ARQ mode: 24, 36, 48, 72,96, 108, 120, 144, 180, 192, 216, 240, 480, 960, 1440, 1920 and 2400 pairs
- Supports dynamic block size switching without interruption
- Programmable number of iterations dynamically changeable per block
- Parameterizable options for soft data input, extrinsic bits, and accumulated state metric
- Adaptive rate change via puncturing interface
- Performs parallel processing with parameterizable number of SISOs (1 to 8) to achieve high throughput
- Decoded data rate varies from 53 Mbps to76 Mbps Virtex®-5 (slowest speed grade, 4 SISO option)
- Latency varies between 4μs and 63μs when targeting Virtex-5 (slowest speed grade, 4 SISO option)