Floating-Point Unit for PowerPC (Single Precision)

Product Details

• Example Designs (ZIP) (ZIP)
• Performance & Size

Documentation

• Floating-Point Unit for the PowerPC (Single Precision)

Device Family Support

• Virtex-4 FX

Requirements

• EDK 9.2i
• ISE™ 9.2 SP1 or higher

Floating-Point intensive algorithms are frequently required for embedded systems and DSP applications like image processing, digital pre-distortion, and audio. Software emulation of the floating point instructions is often too slow for many system requirements and dedicated, tightly coupled floating-point circuitry gives the boost software engineers are looking for.

The Virtex®-4 FPU for PowerPC® 405 is a Xilinx implementation that only supports single precision floating point operations. With provided compiler modifications, single precision floating point instructions can be executed to achieve increased performance over software emulation. Refer to the Virtex-4 datasheet for specific details.

The Virtex-4 FPU for PowerPC 405 Processor is a single precision IEEE-754 compatible peripheral that accelerates floating-point code execution by up to 13x. It is tightly coupled to the PowerPC through the Auxillary Processor Unit (APU) controller and fully supported by the GNU Compiler to ensure hardware abstraction and ease of use.

Key Features

• Accelerates Floating-Point instructions by up to 13x
• Seamless integration within Xilinx Platform Studio maintains typical software development environment and hardware abstraction
• Implementation leverages high-performance DSP48 to ensure peak performance of 79-97 MFLOPS (depending on speed grade)
• Compatible with the IEEE-754 standard for single-precision floating-point arithmetic, with minor and documented exceptions
• Decodes and executes standard PowerPC floating-point instructions. Note: Supports Single Precision operations only.
• 12% area reduction for FPU Lite option (no hardware divide and square root)