OBSAI

Product Details

• Ask Xilinx About this Core

Documentation

• OBSAI
• OBSAI Documentation Lounge (Registration Required)
• Release Notes (PDF)
• Core License Agreement (PDF)

Device Family Support

• Kintex-7
• Virtex-7
• Virtex-6 -1L
• Virtex-6 CXT
• Virtex-6 LXT
• Virtex-6 SXT
• Virtex-5 FXT
• Virtex-5 LXT
• Virtex-5 SXT
• Spartan-6 LXT

The OBSAI LogiCORE™ IP core is a high-performance IP core solution that implements the Open Base Station Architecture Initiative (OBSAI) specification. The IP core uses state-of-the-art RocketIO™ GTP transceivers to implement the OBSAI Physical layer and provides a compact and customizable Data Link Layer which is implemented in the FPGA fabric. The OBSAI core is ideal for connecting Radio and Baseband units within a wireless system. Xilinx OBSAI IP supports RP3 and RP3-01 protocol extensions as selectable options. RP3 protocol is used when channel cards and radio cards are collocated within same chassis and have dedicated RP1 interface to the control card. RP3-01 extension is used in remote radio heads where radio head is located far away from the baseband unit.

Key Features

• Designed to OBSAI RP3 Specification v4.2 for up to 6G line rates
• Operates at line rates of 768 Mbps, 1536 Mbps and 3072 Mbps using Xilinx GTP/GTX/GTPA1 transceivers
• Operates at line rates of 768, 1536, 3072 and 6144 Mbps using Xilinx GTXE1/GTXE2 transceivers
• Implements Physical and data link layer functions
• Includes RP3-01 Auto-negotiation
• Configurable as master or slave
• Provides RP1 Ethernet Messages
• Supports Generic Message Interface for Generic Packets
• Microprocessor neutral configuration interface
• Available through the Xilinx CORE Generator™