3GPP RACH Preamble Detector

Product Details

• Ask Xilinx About this Core

Documentation

• 3GPP RACH Preamble Detector
• Release Notes (PDF)
• Core License Agreement (PDF)

Device Family Support

• Virtex-5 LX
• Virtex-5 LXT
• Virtex-5 SXT
• Virtex-4 FX
• Virtex-4 LX
• Virtex-4 SX
• Spartan-3A DSP

The 3GPP RACH Preamble Detector is commonly used in Wideband Code Division Multiple Access (WCDMA) transmission systems. This LogiCORE™ from Xilinx allows users to scale the solution from Femtocell up to Macrocell architectures. The LogiCORE is also highly cost effective with minimal utilization by using streamed correlation calculations, with support for coherent and non-coherent detection methods. Scalability is maximized through a number of customization inputs to the LogiCORE such as the search window size, coherent accumulation window size, number of antenna, hardware over sample rate and IO quantization. It also offers ease of integration with a suitable DSP or Microprocessor via OCP interfaces.

Key Features

• Scalable solution from Femtocells to Macrocells
• Compact Scalable Correlation unit
• Streamed correlation calculations, allowing minimal hardware use for femto and pico applications
• Coherent and non-coherent result generation in parallel with correlation
• Sorted and filtered PDP results
• Scalable design parameters in the form of search window size, coherent accumulation window, number of antenna, hardware oversample rate and IO quantisation