Reed-Solomon Decoder

Product Details

• Ask Xilinx About this Core

Documentation

• Reed Solomon Decoder
• Release Notes (PDF)
• Core License Agreement (PDF)

Device Family Support

• Artix-7
• Kintex-7
• Virtex-7
• Virtex-6
• Virtex-5
• Virtex-4
• Spartan-6
• Spartan-3A
• Spartan-3A DSP
• Spartan-3E
• Spartan-3

Requirements

• ISE 13.4 or higher
• ISE IP Update 13.4 or higher

Reed-Solomon Encoder and Decoder are commonly used in data transmission and storage applications, such as broadcast equipment, wireless LANs, cable modems, xDSL, satellite communications, microwave networks, and digital TV. The Reed-Solomon Decoder LogiCORE module is a high speed, compact design that implements many different Reed-Solomon coding standards including G.709, DVB, ATSC, IEES and CCSDS. The core is fully synchronous, using a single clock, and supports continuous input data with no gap between code blocks. The core is parameterizable, allowing designers to control the symbol size, the code block length, the number of errors corrected, and the control signal behavior. This Decoder supports both error and erasure decoding. It supports any primitive field polynomial for a given symbol size. The core also counts the number of errors corrected and flags any failures.

Features in v8.0:

• Supports Virtex®-7, Kintex®-7, Virtex-6 and Spartan®-6 device families
• Supports AXI4-stream interface

Features in v7.1:

• Supports Virtex-7, Kintex-7, Virtex-6, Virtex-5, Virtex-5, Virtex-4, Spartan-6, Spartan-3, and Spartan-3A device families

Key Features

• Flexible RS Decoder meeting the requirements of most standards that employ RS codes including: IEEE 802.16, DVB-x, G.709, ETSI-BRAN, and CCSDS
• Fully synchronous design using a single clock
• Supports continuous input data with no gap between code blocks
• Supports symbol size from 3 to 12 bits and any primitive field polynomial for a given symbol width
• Supports code block length variable up to 4095 symbols
• Code block length and number of check symbols can be varied dynamically on a block by block basis
• Supports shortened codes, error and erasure decoding and parameterizable number of errors corrected
• Counts number of errors corrected and flags failures
• Support for multi-channel implementation which improves core efficiency for high speed applications such as OC-192
• Updated puncturing option which improves core efficiency for standards such as IEEE802.16d
• New self-recovery mode feature
• Variable check symbol option added
• Extra bit error statistics outputs
• Extra status outputs: marker bits allow input data to be tagged