This IP Core has been discontinued. Effective Date: 8/21/2012
The 3GPP Searcher from Xilinx is commonly used in Wideband Code Division Multiple Access (WCDMA) transmission systems. This LogiCOREâ„¢ from Xilinx is a highly integrated solution for identifying the multiple transmission paths of users in a 3GPP uplink. The core includes all the logic required for scramble code generation, correlation, accumulation and filtering functions in a single co-processing solution, easily integrated with either a DSP or microprocessor using the available OCP interfaces. This LogiCORE is aimed at offering a compact and scalable solution when either used for Picocell/Femtocell applications or Macrocell, resulting in the lowest cost for the given target application. The Coregen GUI allows users to fully customize to their own needs.
Key Features
Scalable solution from Femtocells to Macrocells allowing appropriate utilization/requirement trade-offs.
Correlation against pilot bit and data bits in DPCCH channel, multiple search correlations in parallel, filtered and unfiltered PDP generation.
Highly integrated, encapsulating all circuitry to generate and maintain PDPs for each search, such as an automatic scramble code advance, scramble code and pilot generation, search correlation, coherent and non-coherent accumulation and PDP filtering.
Fully customizable for number of searches, results, antennas; oversample and clock rates; search window size; quantization and scheduling period.
Efficient search scheduler, allowing fast changing channels to be scheduled more frequently than slower changing channels, for hardware optimization.
Easy integration to microprocessor or DSP via built in OCP interface.