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SMPTE2022-5/6 Video Over IP

 

Part Number:

EF-DI-SMPTE2022-56-SITE

AXI Interface Support:

  • AXI4-Stream
  • AXI4
  • AXI4-Lite

License:

Core License Agreement

Program:

LogiCORE

Design Tools Support:

  • Vivado Design Suite
  • ISE Design Suite

Supports emerging standards for lowering cost of uncompressed HD video transport

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Product Details
Documentation
Device Family Support
  • Kintex-7
  • Virtex-7
  • Virtex-6 HXT
  • Virtex-6 CXT
  • Virtex-6 LXT
  • Virtex-6 SXT

Xilinx provides an interoperable SMPTE2022-5/6 core to accelerate time to market and drive the convergence of broadcast and IP networks.

The SMPTE2022-5/6 LogiCORE™ IP cores support multi-channel Tx and Rx of SD/HD/3G-SDI video over a 10Gb Ethernet network.  The Tx and Rx cores support the proposed standard SMPTE 2022-6 High Bit Rate Media Transport over IP Networks, which describes the encapsulation and de-encapsulation of video to and from IP networks with RTP protocol.  Additionally, the cores support Forward Error Correction (FEC) as described in proposed standard SMPTE 2022-5 Forward Error Correction for High Bit Rate Real-Time Video/Audio Transport over IP. The cores can be integrated into your system along with Triple-Rate SDI, XAUI, AXI Memory Controller and 10Gb Ethernet MAC cores through a SMPTE2022 reference design provided separately.

Key Features

  • Supports multiple channels of SD/HD/3G-SDI
  • SMPTE 2022-6 packetization and de-packetization support with automatic recognition of SDI format to be packetized
  • SMPTE 2022-5 FEC support with block aligned and non block aligned matrices
  • IP firewall and handshaking of standard IP protocols
  • Handles SD/HD/3G outages during IP transmission as well as IP packet drops and out-of-order packet handling for IP reception
  • Timestamp generation and extraction
  • Stream monitoring and selection of FEC matrix parameters on a stream by stream basis
  • The standard SMPTE2022 IP licence covers both the Tx and Rx IP cores as well as the 10Gb Ethernet MAC IP core

Note: The SMPTE2022-5/6 standards are still in draft form and are yet to be published.

 

 1. What are the new features in the SMPTE2022-5/6 LogiCORE™ IP?

See the release notes for new features.

 2. Which Xilinx FPGA families and speed grades does the SMPTE2022-5/6 core support?

Virtex™-6 (-1)

 3. What are the target applications for this product?

The SMPTE2022-5/6 core is primarily targeted at the transport of multiple uncompressed video channels in broadcast and professional A/V environments. For instance, enabling 10GbE contribution links between regional and national studios, or between studios and remote production offices. The SMPTE2022 SDI to IP bridge can be implemented in broadcast equipment throughout the acquisition, production and delivery chain: video servers, switchers, routers, encoders and IRDs, digital cinema applications and more.

 4. With which PHYs is the 10GEMAC compatible?

The 10GEMAC core used with the SMPTE2022 core is designed to be compatible with industry standard PHYs with XGMII interfaces.

 5. What is the availability, cost and licensing terms for the SMPTE2022-5/6 core?

The SMPTE2022-5/6 core is available now. The parameterizable core is configured through a CORE Generator™ GUI and licensed via the Xilinx IP site license. The standard SMPTE2022 IP licence covers both the Tx and Rx IP cores as well as the 10Gb Ethernet MAC IP core. Purchase of the core entitles you to any additional updates which may be released for a period of one year from the date of purchase. Instructions for downloading the core can be found in the product lounge for this core. Licensing information, as well as information on all other Xilinx IP products, can be found on the Xilinx IP Center. Please contact your distributor or Xilinx FAE for pricing information.

 6. Has the SMPTE2022-5/6 core been verified on hardware?

Xilinx has completed hardware verification of the SMPTE2022-5/6 core through development work on the Xilinx Virtex-6 FPGA Broadcast Connectivity Kit (V6BCK).  The design has been verified using XAUI links to CX4 cable via the HiTech Global Dual CX4 module, but can be targeted to optical links. The design has also been successfully proven through interoperability sessions hosted by the Video Services Forum.

 7. How can I evaluate the core

Click the evaluate button on the left hand side of the product page to generate an evaluation license.

 8. Where can I find a list of known issues?

See IP Release Notes for known issues, new features and patches

 9. Do you support other SMPTE2022 standards?

We provide a reference design for SMPTE2022-1/2 (primarily targeted at supporting multiple compressed DVB-ASI streams over 1Gb Ethernet). The reference design targets Virtex-5 FPGAs but is free source code which can be retargeted to 6 series FPGAs. We plan to have new SMPTE2022-1/2 LogiCORE IP in 7 series FPGAs by the end of 2012.

 10. What other Ethernet solutions does Xilinx provide?

The 10GEMAC core is part of the Xilinx Platform FPGA SystemIO solution, which addresses all aspects of system connectivity in high-performance designs. Xilinx provides the most comprehensive Ethernet MAC offerings in the programmable industry. In addition to the 10GEMAC core, Xilinx also provides: 

  • a XAUI standalone core; 
  • a Tri-Mode Ethernet MAC core with a choice of GMII or RGMII; 
  • an Ethernet AVB Endpoint; 
  • a 1000BASE-X PCS with Ten Bit Interface, or integrated 1000BASE-X PCS/PMA or SGMII, a PLB Gb Ethernet MAC, Tri-Mode Ethernet (1000/100/10) MAC core;
  • a 10/100 Ethernet MAC core with choice of OPB or PLB interface for embedded MicroBlaze and PowerPC solutions.

View a complete listing of Xilinx Ethernet IP solutions.

 11. What if I already have a 10Gb Ethernet MAC?

There is an upgrade license available for obtaining just the SMPTE2022 Tx and Rx cores. Please contact your distributor or Xilinx FAE for pricing information.

 
 
 
 
 
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