Main

Floating-Point Operator

 

AXI Interface Support:

  • AXI4-Stream

Bundled With:

Both ISE and Vivado

License:

Xilinx End User License

Program:

LogiCORE

Design Tools Support:

  • Vivado Design Suite
  • ISE Design Suite

Included with Xilinx Software. Floating-Point Operator v6.2 Available Now

Product Details
Documentation
Device Family Support
  • Zynq-7000
  • Artix-7
  • Kintex-7
  • Virtex-7
  • Virtex-6
  • Virtex-5
  • Virtex-4
  • Spartan-6
  • Spartan-3A
  • Spartan-3A DSP
  • Spartan-3E

The extended dynamic range and precision offered by floating-point arithmetic is quickly becoming a requirement in numerous signal processing algorithms that are being used in graphics, advanced wireless communications, instrumentation, industrial control, audio and medical imaging applications. This growing use of floating-point arithmetic places a requirement for area efficient and high performance solutions on hardware engineers of today.

The Xilinx Floating-Point Operator IP provides this solution, giving users the ability to rapidly and easily generate custom operators that can be targeted to any of the latest Xilinx FPGA and SoC Platforms. The IP provides all the necessary IEEE compliant, highly parameterizable floating-point arithmetic operators, allowing engineers to control the fraction and exponent word lengths, as well as the latency and implementation specifics for their algorithm.

Features in v6.2:

  • Supports Virtex®-7, Kintex®-7, Artix-7 device families
  • Supports multiply, add/subtract, accumulator, fused multiply-add, divide, square-root, comparison, reciprocal, reciprocal square-root, absolute value, natural logarithm, exponential, conversion to/from floating-point and fixed-point operations
  • IEEE-754 standard compliant floating-point operator (with only minor documented deviations)
  • Supports AXI4-stream interface
  • Delivers VHDL demonstration test bench
  • A bit-accurate C-Model to enable system level simulation of floating point operations
  • For use with Vivado IP catalog and Xilinx System Generator for DSP

Features in v6.1:

  • Supports Virtex®-7, Kintex®-7, Artix-7, Zynq, Virtex-6, Spartan-6 device families
  • Supports multiply, add/subtract, divide, square-root, comparison, reciprocal, reciprocal square-root, absolute value, natural logarithm, conversion to/from floating-point and fixed-point operations
  • IEEE-754 standard compliant floating-point operator (with only minor documented deviations)
  • Supports AXI4-Stream interface
  • Delivers VHDL demonstration testbench
  • A bit-accurate C-Model to enable system level simulation of floating point operations
  • For use with Xilinx CORE Generator and Xilinx System Generator for DSP

Features in v5.0:

  • Supports Virtex-7, Kintex-7, Virtex-6, Virtex-5, Virtex-4, Spartan-6, Spartan-3, and Spartan-3A device families
  • Supports multiply, add/subtract, divide, square-root, comparison, conversion to/from floating-point and fixed-point operations
  • IEEE-754 standard compliant floating-point operator (with only minor documented deviations)
  • For use with Xilinx CORE Generator
 
 
 
 
 
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