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GigE for Machine Vision (GigEVCore1.0)

 

Part Number:

GigEVCore1.0

License:

SignOnce

Alliance Program Tier:

Certified

Design Tools Support:

  • ISE Design Suite

Device Family Support
  • Virtex-6
  • Virtex-5
  • Virtex-5 FXT
  • Virtex-5 LX
  • Virtex-5 LXT
  • Virtex-5 SXT
  • Virtex-4 FX
  • Virtex-4 LX
  • Virtex-4 SX
  • Spartan-6
  • Spartan-3A
  • Spartan-3E
  • Spartan-3

The machine vision GigE solution consists of one or more FPGA IP cores to design GigE Vision compliant devices mainly for machine vision market. Devices could be cameras, but also receiving component like specialized GigE frame grabbers. The solution maps GigE Visions’s control channel and message channels to a software implemented part, running on an embedded processor like MicroBlaze. The time critical stream channel is fully implemented in hardware to achieve maximum of throughput. Customer is able to use this core to bring GigE Vision functionality to his device. Software can be customized to support device dependent features. Reference Designs (hardware plus FPGA design) for sending and receiving applications show usage of the core and help implementation on own hardware.

Key Features

  • Implementation of GigE Vision Protocol
  • Hardware Implementation of Stream Channel to reach maximum throughput
  • Bidirectional Streaming supported
  • Control Channel handled by embedded CPU
  • Packet Resend supported.
  • Tiny SDRAM controller available or MPMC supported.
  • Reference Design for sending and receiving applications available

Target Markets

  • Wired Communications
  • Industrial Scientific Medical
 
Device Implementation Matrix

Device utilization metrics for example implementations of this core. Contact provider for more information.

Family Device Speed Grade Tool | Version HW Validated? Slice LUT BRAM DSP48 CMT GTx Fmax (Mhz)
Spartan-3E XC3S1200E -4 ISE 9.1 6870 9692 17 5 3 0 84
IP Quality Metrics Table
General Information
This Data was Current On Apr 20,2012
Company NameSensor to Image GmbH
IP NameGigE for Machine Vision (GigEVCore1.0)
IP Part NumberGigEVCore1.0
Current IP Revision Number1.2
Date Current Revision was Released Jun 01,2010
Release Date of first Version May 01,2009
Production Use by Xilinx Customers
Number of successful Xilinx Customer production projects15
Can references be made available?Yes
Deliverables
IP Formats available for purchaseNetlist
Source Code Formats(s)VHDL; C for µBlaze
High-Level Model Included?No
High-level Model Format(s)None
Integration Testbench ProvidedNo
Code Coverage Report Provided?No
Functional Coverage Report Provided?No
UCFs Provided?Yes
Commercial Evaluation Board Available?Yes
FPGA used on boardSpartan-6
Software Drivers Provided?Yes
Driver OS SupportWindows and LINUX
Implementation
Code Optimized for Xilinx?No
Synthesis Software Tools Supported / versionXilinx XST / 11.5, 12.1
Static Timing Analysis Performed?Yes
Standard IP Interface(s) SupportedNone
IP-XACT Metadata Included?No
Verfification
Is a documented verification plan available?Yes, document only plan
Test MethodologyConstrained-random testing
AssertionsYes
Coverage Metrics CollectedCode; Functional
Timing Verification Performed?Yes
Timing Verification Report AvailableYes
Simulators supportedMentor ModelSIM / 6.5DE
Hardware Validation
Validated on FPGAYes
Hardware validation platform usedSpartan-6
Industry standard compliance testing passedYes
Specific compliance testhttp://www.machinevisiononline.org
Test date2010-06-01 00:00:00.0
Are test results available?Yes
 
 
 
 

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