Multiply Accumulator
Bundled With:
ISE
License:
Xilinx End User License
Program:
LogiCORE
Design Tools Support:
- Vivado Design Suite
- ISE Design Suite
Product Details
Documentation
Device Family Support
- Artix-7
- Kintex-7
- Virtex-7
- Virtex-6
- Virtex-5
- Virtex-4
- Spartan-6
- Spartan-3A
- Spartan-3A DSP
- Spartan-3E
- Spartan-3
Requirements
- ISE 13.4 or higher
- ISE IP Update 13.4 or higher
The Multiply Accumulator IP accepts two operands, a multiplier and a multiplicand, and produces a product (A*B=Prod) that is added/subtracted to the previous adder/subtracter result (S=S+/-Prod). This product value can be loaded with assertion
of Bypass (S=Prod). The Multiply Adder IP is implemented using Xtreme DSP™ slices and operates on signed or unsigned data.
Key Features
- Supports multiplier inputs ranging from 1 to 31 bits unsigned or 2 to 32 bits signed and an output width ranging from 1 to 79 bits unsigned or 2 to 80 bits signed
- Latency can be set for optimal speed or the minimal amount of pipelining allowed "Latency = 1" (accumulation register required)
- Instantaneous Resource Estimation
- For use with Xilinx CORE Generator™