OPB/PLB PCI32 Interface
The OPB to PCI 32/33 Bridge is offered as an evaluation core in the EDK. To generate a full OPB to PCI license, the PCI-32 LogiCORE must be purchased.
Need Help?
Documentation
Device Family Support
- Virtex-4 FX
- Virtex-4 LX
- Virtex-4 SX
- Virtex-II Pro
- Virtex-II
- Virtex-E
- Virtex
- Spartan-3A
- Spartan-3
- Spartan-IIE
The OPB IPIF/ V3 PCI Core Bridge design bridges the OPB IPIF (On-Chip Peripheral Bus Intellectual Property Interface) and the PCI64 Interface v3.0 core providing full bridge functionality between the Xilinx 32-bit OPB and a 32-bit V2.2 compliant PCI (Peripheral Component Interconnect) bus. Only 33/66 MHz, 32-bit PCI buses are supported at this time. This IP core is one of more than 20 IP cores that are part of the Embedded Development Kit.
Available to all licensees of the PCI32 LogiCORE™ IP cores.
Available to all licensees of the PCI32 LogiCORE™ IP cores.
Key Features
- One of the infrastructure cores supported by the Embedded Development Kit (EDK)
- 33/66 MHz, 32-bit PCI buses
- Utilizes the SRAM interface of the OPB IPIF for PCI data transfers
- OPB and PCI clocks are required to be a global buffer