Product Description
The Accumulator IP provides LUT and single DSP48 slice accumulation implementations. The Accumulator module can implement adder-based, subtracter-based, and dynamically configurable adder/subtracter-based accumulators operating on signed or unsigned data. The Accumulator module can generate adder-based, subtracter-based and adder/subtracter-based accumulators operating on signed or unsigned data. The function can be implemented in a single DSP48 slice or LUTs (but currently not a hybrid of both). Pipelining is available for both implementations.
Key Features and Benefits
- Generates add, subtract, and add/subtract-based accumulators
- Supports two’s complementsigned and unsigned operations
- Supports fabric implementation outputs up to 256 bits wide
- Supports DSP slice implementation outputs up to 58 bits wide (max width varies with device family)
- Supports pipelining (automatic and manual)
- User-programmable feedback scaling for fabric implementations
- Optional carry output
- Optional clock enable and sclr
- Optional Bypass (Load) capability
Resource Utilization
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