AHB Lite to AXI Bridge
AXI Interface Support:
- AXI4
Bundled With:
EDK
License:
Xilinx End User License
Program:
LogiCORE
Design Tools Support:
- Vivado Design Suite
- ISE Design Suite
Documentation
Device Family Support
- Zynq-7000
- Artix-7
- Kintex-7
- Virtex-7
- Virtex-6
- Spartan-6
The AMBA® (Advanced Microcontroller Bus Architecture) AHB-Lite (Advanced High Performance Bus) to AXI (Advanced extensible interface) bridge translates AHB-Lite transactions into AXI4 transactions. It functions as an AHB-Lite slave on the AHB bus and as an AXI master on the AXI bus.
Key Features
- Supports 1:1 (AXI:AHB) synchronous clock ratio
- AHB and AXI data widths are the same and either 32 or 64 bit based on the configuration
- Supports narrow transfers on the AHB interface
- Supports burst termination on the AHB during which dummy transfers are initiated on the AXI interface
- Timeout feature to indicate no response from AXI slave during write and read transactions