We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AHB Lite to AXI Bridge

Product Description

The AMBA® (Advanced Microcontroller Bus Architecture) AHB-Lite (Advanced High Performance Bus) to AXI (Advanced extensible interface) bridge translates  AHB-Lite transactions into AXI4 transactions. It functions as an AHB-Lite slave on the AHB bus and as an AXI master on the AXI bus.

Key Features and Benefits

  • Supports 1:1 (AXI:AHB) synchronous clock ratio
  • AHB and AXI data widths are the same and either 32 or 64 bit based on the configuration
  • Supports narrow transfers on the AHB interface
  • Supports burst termination on the AHB during which dummy transfers are initiated on the AXI interface
  • Timeout feature to indicate no response from AXI slave during write and read transactions


Featured Documents

Page Bookmarked