Main

AXI Serial Peripheral Interface

 

AXI Interface Support:

  • AXI4-Lite

Bundled With:

EDK

License:

Xilinx End User License

Program:

LogiCORE

Design Tools Support:

  • Vivado Design Suite
  • IDS Embedded Edition

Documentation
Device Family Support
  • Kintex-7
  • Virtex-7
  • Virtex-6 HXT
  • Virtex-6 LXT
  • Virtex-6 SXT
  • Spartan-6 LX
  • Spartan-6 LXT
  • Zynq-7000
  • Artix-7

The AXI Serial Peripheral Interface (SPI) connects to the Advanced eXtensible Interface (AXI4). This core provides a serial interface to SPI devices such as SPI EEPROMs and SPI serial flash devices. The SPI protocol, as described in the Motorola M68HC11 data sheet, provides a simple method for a master and a selected slave to exchange data. This 32-bit soft IP core is designed to interface with the AXI4-Lite interface.

Key Features

  • AXI4-Lite interface is based on the AXI4 specification
  • Connects as a 32-bit AXI4-Lite slave
  • Supports four signal interface (MOSI, MISO, SCK and SS)
  • Supports slave select (SS) bit for each slave on the SPI bus
  • Supports full-duplex operation
  • Supports master and slave SPI modes
  • Supports programmable clock phase and polarity
  • Supports continuous transfer mode for automatic scanning of a peripheral
 
 
 
 
 
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