The Xilinx Universal Serial Bus 2.0 High Speed Device with Advance Micro controller Bus Architecture Advanced eXtensible Interface (AXI) enables USB connectivity to the user’s design with a minimal amount of resources. This interface is suitable for USB-centric, high-performance designs, bridges, and legacy port replacement operations.
Key Features
- AXI Interface based on the AXI4 specification
- Supports burst lengths of 1-256 beats with INCR type transfers
- Compliant with the USB 2.0 Specification
- Supports high-speed and full-speed
- Supports Universal Transceiver Macrocell Interface (UTMI) + Low Pin Interface (ULPI) to external USB PHY
- Supports parameterized ULPI PHY Reset
- Supports detection of Resume and Reset features in low-power mode
- High-bandwidth ISOC transfers support
- Improved BRAM utilization optimization