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ChipScope Pro IBERT for 7 Series GTX

 

Bundled With:

Both ISE and Vivado

License:

Xilinx End User License

Program:

LogiCORE

Design Tools Support:

  • Vivado Design Suite
  • ISE Design Suite

Documentation
Device Family Support
  • Kintex-7
  • Virtex-7

The ChipScope™ Pro Integrated Bit Error Radio Tester (IBERT) core for Kintex™-7 FPGA GTX transceivers is a customizable core that can be used to evaluate and monitor the health of Kintex-7 FPGA GTX transceivers. The design includes pattern generators and checkers implemented in FPGA logic, as well as access to the ports and dynamic reconfiguration port (DRP) attributes of the GTX transceivers.

Key Features

  • Provides a communication path between the ChipScope Pro Analyzer software and the IBERT core.
  • Has user-selectable number of Kintex-7 FPGA GTX transceivers.
  • Each transceiver can be customized for the desired line rate, reference clock rate, reference clock source, and datapath width.
  • Requires a system clock that can be sourced from a pin or one of the enabled GTX transceivers.
 
 
 
 
 
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