ChipScope Integrated Controller (ICON)
Bundled With:
Both ISE and Vivado
License:
Xilinx End User License
Program:
LogiCORE
Design Tools Support:
- Vivado Design Suite
- ISE Design Suite
- IDS Embedded Edition
Documentation
Device Family Support
- Zynq-7000
- Artix-7
- Kintex-7
- Virtex-7
- Virtex-6
- Virtex-6 LXT
- Virtex-5
- Virtex-4
- Virtex-4 XA
- Spartan-6
- Spartan-6 LX
- Spartan-6 LXT
- Spartan-6 XA
- Spartan-3A
- Spartan-3A DSP
- Spartan-3AN
- Spartan-3A XA
- Spartan-3E
- Spartan-3
The LogiCORE® IP ChipScope Pro Integrated core (ICON) provides an interface between the JTAG Boundary Scan (BSCAN) interface of the FPGA device and the ChipScope Pro cores, including the following types of cores:
- Integrated Logic Analyzer (ILA)
- Virtual Input/Output (VIO)
- Agilent Trace Core 2 (ATC2)
Integrated Bus Analyzer (IBA) This interface allows the ChipScope Pro Analyzer software to communicate with these cores through the JTAG port of the device. The ICON core is designed to be easily instantiated and connected to these cores directly in a Verilog or VHDL design. The ICON core can also be added to an embedded processor system design using the Xilinx Embedded Development Kit (EDK) tools.
Key Features
- Provides a communication path, using the JTAG port, between the ChipScope Pro Analyzer software and the ILA, VIO, ATC2, and IBA cores
- Connects to the JTAG chain through the USER scan chain feature of the BSCAN component
- Supports up to 15 connections ILA, VIO, ATC2, and IBA cores
- Optionally attaches to either internally or externally instantiated BSCAN primitives, such as the one provided by the opb_mdm EDK core