Digital Clock Manager (DCM) Module
Bundled With:
EDK
License:
Xilinx End User License
Program:
LogiCORE
Design Tools Support:
- IDS Embedded Edition
Documentation
Device Family Support
- Virtex-4 LX
- Virtex-4 SX
- Virtex-II Pro
- Virtex-II
- Spartan-3
- Virtex-4 FX
The Digital Clock Manager (DCM) primitive in Xilinx FPGA parts is used to implement delay locked loop, digital frequency synthesizer, digital phase shifter, or a digital spread spectrum. The digital clock manager module is a wrapper around the DCM primitive which allows it to be used in the EDK tool suite.
Key Features
- Wrapper around the FPGA architecture DCM primitive, providing full support for use with the EDK design tools
- Support both active high and active low reset
- Configurable BUFG insertion