LEDA™ ProVHDL/Verilog - HDL Code Checker

Device Family Support

• Virtex-II Pro
• Virtex-II
• Virtex-E
• Virtex
• Spartan-3E
• Spartan-3
• Spartan-II
• Spartan-IIE

LEDA products deliver upfront HDL code verification for reducing debug efforts and enhancing the quality of FPGA designs

ProVHDL and ProVerilog are members of the LEDA family of programmable HDL coding-style checkers from Synopsys. The LEDA checkers verify that HDL code meets standards for quality and workmanship, and also checks whether the coding-style enables optimum performance from downstream design tools.

The LEDA set of tools can verify your module against standard, good coding practices. This reduces the chance of problems cropping up during implementation due to inefficient coding such as the introduction of unnecessary latches into the finished module causing timing analysis problems. The programmable LEDA tools are flexible enough to support corporate design techniques and to assure your source code meets your own specific standards.