CoreConnect™ is an IBM-developed on-chip bus-communications link that enables chip cores from multiple sources to be interconnected to create entire new chips. CoreConnect technology eases the integration and reuse of processor, system and peripheral cores within standard product platform designs to achieve overall greater system performance. The CoreConnect bus architecture includes the Processor Local Bus (PLBv46), a bus bridge, two arbiters, and a Device Control Register (DCR) bus.
Xilinx offers the IBM CoreConnect license to its embedded processor customers since CoreConnect technology serves as a possible infrastructure for Xilinx embedded processor designs using the ISE Design Suite and Embedded Development Kit. Newer designs that utilize the Vivado Design Suite and/or AXI Interconnect do not require this license.
The MicroBlaze™ processor uses the same bus for peripherals as the IBM PowerPC® processor. While the MicroBlaze soft processor does not have any dependency on the PowerPC processor, the designer may use devices that contain an embedded PowerPC processor and share its peripherals. After registering for IBM CoreConnect technology and signing the web-based license agreement, you may access IBM CoreConnect technology.
Key Features & Benefits
- Supports the same interconnect bus used on the hard embedded PowerPC core in Virtex®-5, Virtex-4, and and the MicroBlaze 32-bit soft processor core in the other Spartan™ and Virtex series FPGAs
- Includes the high-speed Processor Local Bus and the lower bandwidth On chip Peripheral Bus
- Provides a comprehensive set of peripherals that can be attached to the bus to be used with either processor core
Tools and Device Support
Device Family Support:
Design Tools Support:
- Bundled With: Embedded Development Kit