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IEEE 802.3bj Reed-Solomon Forward Error Correction

Product Description

Xilinx® offers the 100 Gigabit IEEE 802.3bj Reed-Solomon Forward Error Correction (RS-FEC) IP core for data center and enterprise applications. This core is designed to the IEEE 802.3bj-2014 specification and connects seamlessly to the Xilinx integrated or soft 100G Ethernet MAC IP on Virtex® UltraScale™.

Key Features & Benefits

  • Low latency
  • Supports 100 Gigabits
  • Configuration and status bus
  • Selectable AXI4-Lite interface for status output
  • Transcode Bypass mode for direct access to RS-FEC encoder/decoder
  • Example reference design demonstrating integrated 100G Ethernet IP with RS-FEC
  • ECC RAM option
xilinx-131x43
Order Evaluate
  • Part Number:
    EF-DI-100G-RS-FEC-SITE
    EF-DI-100G-RS-FEC-PROJ
  • License: Core License Agreement
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