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Peak Cancellation Crest Factor Reduction (PC-CFR)

Product Description

Xilinx provides a CFR solution for common wireless standards that is low cost, flexible, low power and solves your time to market needs.

Crest Factor Reduction (CFR) is one of the most fundamental building blocks in wireless communication systems today. CFR is used to reduce the dynamic range of a transmitted signal so that amplifiers being used to transmit that signal can be run with less back off. In a typical commercial wireless system, this would be used in combination with Digital Up Conversion (DUC) and Digital Pre-Distortion (DPD). There are many different algorithms for CFR, from Peak Windowing (PW) and Noise Shaping (NS) to this method of Peak Cancellation (PC), which gives rise to the product name PC-CFR. This method is much more flexible than other methods, while being higher performance resulting in greater Peak to Average Ratio (PAR) reduction and yet extremely small and cost effective in its implementation.

The PC-CFR core reduces implementation time by providing a high performance CFR solution to customers as a parameterizable core, rather than one that needs design by hand to potentially meet a multitude of different wireless standards and performance criteria.

PC-CFR supports the following air interface standards:

  • LTE/LTE-Advanced
  • TD-SCDMA
  • WCDMA
  • WiMAX
  • CDMA2000
  • MC-GSM (including frequency hopping)

Key Features & Benefits

  • CFR v5.0 is enhanced to allow the core to build various architectures for Multi-RAT capability with maximum bandwidth support up to 100MHz in SingleRAT and up to 80MHz in Multi-RAT configurations
  • Support for dynamic power and frequency variation
  • Support for 491.52MHz in Kintex-2 speed grade (allowing an additional area saving
  • Support for multiple air interfaces including frequency hopping MC-GSM up to 8 GSM carriers
  • Support for hard clipper final stage (optional)
  • Parameterizable selection of clocks/output sample (1 to 12) to enable optimum area to be achieved with various output sample rates
  • Parameterizable selection of Cancellation Pulse Generators (CPG's) (1 to 8) to allow optimum performance vs area trade off.
  • Pararameterizable selection of number of antennas from 1 to 8
  • Single netlist supporting multiple iterations and multiple antennas to reduce overall implementation complexity and improve ease of use
  • Increased length of Cancellation Pulse to 2047 to support air interfaces up to 100MHz
  • Latency control to allow low latency implementations (Repeater applications)
  • Matlab simulator for creation of waveform-specific pulse coefficients and automatic generation of Coregen coefficient file
  • C-Model Simulation support

Tools and Device Support

Device Family Support:

Design Tools Support:

Product Vendor:

Xilinx
xilinx-131x43
Order Evaluate

Part Number:

EF-DI-PC-CFR-SITE

License:

Core License Agreement

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