Embedded Tri-mode Ethernet MAC Wrapper
The CORE Generator™ Embedded Tri-mode Ethernet Media Access Controller (MAC) Wrapper automates the generation of HDL wrapper files for the embedded Tri-mode Ethernet MAC in Virtex™-4 FX devices. Preconfigured HDL wrappers as well as a low level driver file are generated automatically based on user defined options.
Key Features & Benefits
- Provides user configurable Virtex-4 FX Tri-mode Ethernet MAC (EMAC) physical interface
- Simplifies interconnection between the Ethernet MAC and the PHY
- Allows selection of one or both of the two Ethernet MACs (EMAC0 or EMAC1) from the Ethernet MAC primitive
- Defines EMAC0/EMAC1 configuration vectors based on user options
- Supports MII, GMII, RGMII v1.3, RGMII v2.0, SGMII, and 1000BASE-X PCS/PMA interfaces
- Clock Enable inputs on the Transmit and Receive clients available when the Ethernet MAC is configured in MII mode
- Instantiates BUFs, DCMs, GT11s, and logic required for MII, GMII, RGMII, SGMII, and 1000BASE-X PCS/PMA interfaces
- Includes low-level driver example for DCR accesses
- Includes testbench for wrappers using the EMAC and GT11 Smartmodels
- Generates VHDL or Verilog wrappers
- 16-bit client interface is now supported
- New "Byte PHY" clocking scheme for Tri-Mode Full Duplex only GMII/MII (halves the BUFG requirements)
- Implementation scripts and UCF file
- Simulation scripts for Mentor Modelsim and Cadence IUS (functional and timing simulation)
- License: Xilinx End User License Agreement
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