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Multiply Adder

Product Description

The Multiply Adder IP performs a multiplication of two operands and adds (or subtracts) the full-precision product to a third operand.The Multiply Adder IP is implemented using Xtreme DSP™ slices and operates on signed or unsigned data.

Key Features & Benefits

  • Supports twos complement-signed and unsigned operations
  • Supports multiplier inputs ranging from 1 to 52 bits unsigned or 2 to 53 bits signed and an add or subtract operand input ranging from 1 to 105 bits unsigned or 2 to 106 bits signed
  • Optional pipelined operation
xilinx-131x43
  • Bundled With: Vivado Design Suite
    ISE Design Suite
  • License: Xilinx End User License Agreement
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