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LogiCORE IP Mutex

Product Description

Mutex provides a mechanism for mutual exclusion to enable one process to gain exclusive access to a particular resource in a multi-processor environment. The Mutex core contains a configurable number of mutexes. Each of these can be associated with a 32-bit user configuration register to store arbitrary data.

Key Features & Benefits

  • Supports AXI4-Lite and PLBv4.6
  • Configurable number of PLB interfaces from 0 to 8
  • Configurable number of AXI4-Lite interfaces from 0 to 8
  • Configurable asynchronous or synchronous interface operation
  • Configurable USER register
  • Configurable number of mutexes
  • Configurable CPUID width
  • Bundled With: Embedded Development Kit
    Vivado Design Suite
  • License: Xilinx End User License Agreement

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