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PowerPC 440 DDR2 Memory Controller

Product Description

This data sheet describes the DDR2 Memory Controller reference design for the PowerPC® 440 block embedded in the Virtex®-5 FXT Platform FPGAs. It interfaces with the Memory Controller Interface (MCI) and provides the control interface for DDR2 memory.

Key Features & Benefits

  • Supports a maximum performance of 333 MHz in the fastest speed grade
  • Supports 16-bit, 32-bit, and 64-bit data widths, and 72-bit data width with ECC (DQ:DQS = 8:1) 
  • Supports DDR2 SDRAM single-rank registered DIMMs and components
  • Supports bank management (up to four banks open)

Featured Documents

Tools and Device Support

Device Family Support:

Design Tools Support:

xilinx-131x43
  • License: Xilinx End User License Agreement
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