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RLD3 Controller

Product Description

The RLD3 Controller gives you the ability to design for Reduced Latency DRAM while maintaining high performance and density. Build the RLD3 Controller with the Memory Interface GUI to get a complete set of unencrypted RTL, constraints, simulation files, and scripts.

Key Features & Benefits

  • x9, x18, x36 device targets
  • Up to 2.24Gb density
  • Source code delivery in Verilog
  • Bundled With: Vivado Design Suite
  • License: Xilinx End User License Agreement

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