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Test Pattern Generator

 

AXI Interface Support:

  • AXI4-Stream
  • AXI4-Lite

License:

Core License Agreement

Program:

LogiCORE

Design Tools Support:

  • Vivado Design Suite
  • IDS Embedded Edition

Xilinx Test Pattern Generator IP Core provides convenient generation of test patterns for Video System bring up, evaluation and debug.

Need Help?

Documentation
Device Family Support
  • Zynq-7000
  • Artix-7
  • Kintex-7
  • Virtex-7 HT
  • Virtex-7T
  • Virtex-7 XT
The Xilinx Test Pattern Generator IP Core generates test patterns for Video System bring up, evaluation and debug. The core provides a wide variety of tests patterns enabling users to debug and asses video system color, quality, edge and motion performance and/or quality issues. The core can be inserted in an AXI4-Stream video interface that allows user selectable pass-through of system video signals or insertion of test patterns.

Key Features

  • Supports pass through of video signals in addition to generation of a wide variety of test patterns including:
    • Full screen solid colors, color bars, tartan bars, temporal ramp, spatial ramp and zone plate with adjustable sweep and speed
    • Overlaid on incoming image or on test pattern: crosshairs, moving box, addition of noise and insertion of stuck pixels
  • Supports 8, 10, and 12-bits per color component input  and output
  • Supports spatial resolutions from 32x32 up to 7680x7680
    • Supports 1080P60 in all supported device families
    • Supports 4kx2k @ 24 Hz in supported high performance devices
 

 1. What deliverable are provided with the Test Pattern Generator core?
  • HDL design files
  • Drivers
  • Comprehensive Data Sheet
  • Online Release Notes containing list of New Features and Known Issues.
  • A Test Bench are also available for the core (Vivado only).
 2. What are the target applications for this product?

Video and image processing applications in Aerospace and Defense, Automotive, Broadcast, Consumer, Industrial and Medical applications

 3. What Xilinx FPGA families and speed grades does the Test Pattern Generator core support?

Please refer to the Device Family Support section of the Product Guide for information on supported FPGA device families and speed grades.

 4. What is the availability, cost and licensing terms for the Test Pattern Generator core?

The Test Pattern Generator core is available now. The Test Pattern Generator Core is available at no cost.

 5. What are the FPGA resource requirements for the core, and are there any features that can be omitted to reduce this?

Refer to the data sheet for detailed resource requirements. Resource requirements are dependent upon the option selected at synthesis time.

 6. Has the Test Pattern Generator core been verified in hardware?

Yes

 7. How can I evaluate the core

It is available at no cost in EDK and Vivado.

This core is provided under the terms of the Xilinx LogiCORE Site License Agreement. For information, please contact your distributor or Xilinx FAE.

 
 
 
 
 
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