Industry-leading designers of today’s most advanced designs rely on the Synopsys VCS© functional verification solution for their verification environments. In fact, 90% of designs at 32nm and below are verified with VCS. Used by a majority of the world’s top 20 semiconductor companies as their primary verification solution,VCS provides the high performance simulation engines, constraint solver engines, Native Testbench (NTB) support, broad SystemVerilog support, verification planning, coverage analysis and closure, and an integrated debug environment. VCS has continually pioneered numerous industry-first innovations, and is now poised to meet the challenges and complexity of today’s SoCs. With features such as constrained random testbench, SoC optimized compile flow, coverage, and assertions, VCS has the flexibility and capabilities that are critical for today’s SoC design and verification teams’ success
Key Features
- Unified coverage stores code, functional, assertion, formal, and trending analysis with flexible and power analysis and output options.
- VCS DVE unifies design, assertion, testbench, C/C++/SystemC, coverage, and planning in one powerful, yet easy to use, GUI.
- VCS Echo testbench coverage convegence technology creates intelligent stimulus.
- VCS Multicore technology enables 2x verification speedup.
- VCS VMM Planner closes the verification plan-to-coverage loop with simulation and coverage annotation to plans written in Excel or Word.
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Target Markets
- Aerospace & Defense
- Automotive
- Broadcast
- Consumer
- High Performance Computing
- Industrial Scientific Medical
- Wired Communications
- Wireless Communications