XPS Central DMA Controller
Bundled With:
EDK
License:
Xilinx End User License
Program:
LogiCORE
Documentation
Device Family Support
- Virtex-6
- Virtex-5 FX
- Virtex-5 FXT
- Virtex-5 LX
- Virtex-5 LXT
- Virtex-5 SX
- Virtex-5 SXT
- Virtex-5 TXT
- Virtex-4
- Spartan-6
- Spartan-3A
- Spartan-3AN
- Spartan-3E
- Spartan-3
The XPS Central DMA Controller provides simple Direct Memory Access (DMA) services to peripherals and memory devices on the PLB. The controller transfers a programmable quantity of data from a source address to a destination address without processor intervention.
Key Features
- Connects as a 32-bit master/slave on PLB V4.6 buses of 32, 64 or 128 bits
- Provides a single physical channel of Direct Memory Access between a source address and a destination address
- Provides programmable registers for source address, destination address and transfer length
- Supports different clock domains for Master and Slave interfaces
- Supports setting up of source and destination addresses as incrementing or fixed (keyhole)
- Supports PLB burst transfers