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XPS Central DMA Controller

Product Description

The XPS Central DMA Controller provides simple Direct Memory Access (DMA) services to peripherals and memory devices on the PLB. The controller transfers a programmable quantity of data from a source address to a destination address without processor intervention.

Key Features & Benefits

  • Connects as a 32-bit master/slave on PLB V4.6 buses of 32, 64 or 128 bits
  • Provides a single physical channel of Direct Memory Access between a source address and a destination address
  • Provides programmable registers for source address, destination address and transfer length
  • Supports different clock domains for Master and Slave interfaces
  • Supports setting up of source and destination addresses as incrementing or fixed (keyhole)
  • Supports PLB burst transfers

Tools and Device Support

Device Family Support:

Design Tools Support:

xilinx-131x43
  • Bundled With: Embedded Development Kit
  • License: Xilinx End User License Agreement
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