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XPS LocalLink FIFO

Product Description

This core allows memory mapped access to a LocalLink interface. The core can be used to interface to the XPS_LL_TEMAC without the need to use DMA. Other uses include interfacing to the LocalLink interfaces on PLBv46_PCIe and PLBv46_PCI.

Key Features & Benefits

  • 32 Bit PLBv46 slave interface with point to point optimizations.
  • Independent internal 2K byte TX and RX data FIFOs
  • Full duplex operation.
  • Provides interrupts for many error and status conditions.

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Tools and Device Support

Device Family Support:

Design Tools Support:

  • Bundled With: Embedded Development Kit
  • License: Xilinx End User License Agreement

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