XPS Mutex
Bundled With:
EDK
License:
Xilinx End User License
Program:
LogiCORE
Design Tools Support:
- ISE Design Suite
Documentation
Device Family Support
- Virtex-6
- Virtex-5 FX
- Virtex-5 FXT
- Virtex-5 LX
- Virtex-5 LXT
- Virtex-5 SX
- Virtex-5 SXT
- Virtex-5 TXT
- Virtex-4
- Virtex-II Pro
- Virtex-II
- Spartan-6
- Spartan-3A
- Spartan-3A DSP
- Spartan-3AN
- Spartan-3E
- Spartan-3
In a multi processor environment the processors share common resources. The mutex provides a mechanism for mutual exclusion to enable one process to gain exclusive access to a particular resource. XPS Mutex core contains a configurable number of mutexes. Each of these can be associated with a 32-bit User configuration register to store arbitrary data.
Key Features
- PLB interface is based on PLB v4.6 specification
- Configurable number of PLB interfaces from 1 to 8
- Configurable asynchronous or synchronous interface operation
- Configurable USER register
- Configurable number of mutexes
- Configurable CPUID width
- Configurable enhanced security through hardware identification support