Main

XPS Serial Peripheral Interface

 

Bundled With:

EDK

License:

Xilinx End User License

Program:

LogiCORE

Design Tools Support:

  • ISE Design Suite

Documentation
Device Family Support
  • Virtex-6
  • Virtex-5 LX
  • Virtex-5 LXT
  • Virtex-5 SXT
  • Virtex-4 FX
  • Virtex-4 LX
  • Virtex-4 SX
  • Spartan-6
  • Spartan-3A
  • Spartan-3AN
  • Spartan-3E
  • Spartan-3
The XPS Serial Peripheral Interface (SPI) connects to the PLB (Processor Local Bus) and provides a serial interface to SPI devices such as SPI EEPROMs. The SPI protocol, as described in the Motorola M68HC11 data sheet, provides a simple method for a master and a selected slave to exchange data.

Key Features

  • Connects as a 32-bit slave on PLB V4.6 buses of 32,
  • Supports four signal interface (MOSI, MISO, SCK and SS)
  • Supports slave select (SS) bit for each slave on the SPI bus
  • Supports full-duplex operation
  • Supports master and slave SPI modes
  • Supports programable clock phase and polarity
  • Optional transmit and receive FIFOs
  • Optional transmit and receive FIFOs scanning of a peripheral
  • Supports back-to-back transactions
  • Supports automatic or manual slave select modes
  • Supports local loopback capability for testing
 
 
 
 
 
 
 
/csi/footer.htm