Product Details
Device Family Support
- Spartan-3
- Spartan-3E
- Virtex-4 FX
- Virtex-4 LX
- Virtex-4 SX
- Virtex-5 LX
- Virtex-5 LXT
- Virtex-5 SXT
The Helion AES cores implement the 128-bit block-size NIST FIPS AES algorithm. Two main functions are available, encryption and decryption, and are offered separately for optimum flexibility. The encryptor core accepts a 128-bit plaintext input block, and generates a corresponding 128-bit ciphertext output block using a supplied 128-, 192-, or 256-bit AES key. The decryptor core provides the reverse function, generating plaintext from supplied ciphertext, using a similar AES key as was used for encryption.
Key Features
- Implements AES (Rijndael) to latest NIST FIPS PUB 197.
- Full dynamic support for all AES key sizes (128, 192 and 256-bits).
- Designed especially for medium data throughput/low area applications.
- Configurable for full duplex operation or resource shared half duplex operation
- Full support available for all Block Cipher Modes.
- Available under the terms of the SignOnce IP License.
