OBSAI

Product Details

• Ask Xilinx About this Core

Documentation

• OBSAI
• Release Notes (PDF)
• Xilinx Core Site License (PDF)

Device Family Support

• Virtex-6 -1L
• Virtex-6 LXT
• Virtex-6 SXT
• Virtex-5 FXT
• Virtex-5 LXT
• Virtex-5 SXT

The OBSAI LogiCORE™ IP core is a high-performance IP core solution that implements the Open Base Station Architecture Initiative (OBSAI) specification. The IP core uses state-of-the-art RocketIO™ GTP transceivers to implement the OBSAI Physical layer and provides a compact and customizable Data Link Layer which is implemented in the FPGA fabric. The OBSAI core is ideal for connecting Radio and Baseband units within a wireless system. It provides the option for either RP3 or RP3-01 extension, which enables Remote Radio Units (RRUs) to be located independent from the Baseband Unit (BBU) in a single efficient protocol.

Key Features

• Designed to OBSAI Specification v4.1 for up to 3G line rates
• Operates at line rates of 768 Mbps, 1536 Mbps and 3072 Mbps using Xilinx GTP/GTX
• Implements Physical and data link layer functions
• Includes RP3-01 Auto-negotiation
• Configurable as master or slave
• Provides RP1 Ethernet Messages
• Supports Generic Message Interface for Generic Packets
• Microprocessor neutral configuration interface
• Available through the Xilinx CORE Generator