Product Details
Documentation
Device Family Support
- Virtex-5 LXT
- Virtex-5 SXT
Requirements
The OBSAI LogiCORE™ IP core is a high-performance IP core solution that implements the Open Base Station Architecture Initiative (OBSAI) specification. The IP core uses state-of-the-art RocketIO™ GTP transceivers to implement the OBSAI Physical layer and provides a compact and customizable Data Link Layer which is implemented in the FPGA fabric. The OBSAI core is ideal for connecting Radio and Baseband units within a wireless system. It provides the option for either RP3 or RP3-01 extension, which enables Remote Radio Units (RRUs) to be located independent from the Baseband Unit (BBU) in a single efficient protocol.
Key Features
- Designed to OBSAI Specification v4.0
- Operates at line rates of 768 Mbps, 1536 Mbps and 3072 Mbps using Xilinx GTP
- Implements Physical and data link layer functions
- Includes RP3-01 Auto-negotiation
- Configurable as master or slave
- Provides RP1 Ethernet Messages
- Microprocessor neutral configuration interface
- Available through the Xilinx CORE Generator
