Image Processing Pipeline

Documentation

• Image Processing Pipeline

Device Family Support

• Virtex-5
• Spartan-3A DSP

The Image Processing Pipeline LogiCORE™ IP is an optimized hardware block to pre-process images captured by a color image sensor fitted with a Bayer Color Filter Array (CFA).

The Xilinx Image Processing Pipeline LogiCORE provides an efficient and low-footprint solution to correct defective pixels, interpolate the missing color components for every pixel, correct colors to adjust to lighting conditions, and set gamma to compensate for the intensity distortion of different display devices.

Key Features

• Scalable data width (8, 10, 12 bits)
• Frame Rates up to 60 fps
• Resolution support up to 2048 x 2048 including HD
• RGB and CMY Bayer CFA support
• MicroBlaze PLB 4.6 interface
• Optional output interface to frame buffer
• Software support for module configuration