Product Details
Documentation
Device Family Support
- Spartan-3 XA
- Spartan-3
- Spartan-3A
- Spartan-3A DSP
- Spartan-3E
- Spartan-3E XA
- Virtex-4 FX
- Virtex-4 FX XA
- Virtex-4 LX
- Virtex-4 SX
- Virtex-5 LX
- Virtex-5 LXT
- Virtex-5 SXT
- Virtex-II Pro
Requirements
- ISE 9.2i SP3 or higher
- ISE 9.2i IP Update 2 or higher
The Fast Fourier Transform (FFT) is a fundamental building block used in DSP systems, with applications ranging from OFDM based Digital MODEMs, to Ultrasound, RADAR and CT Image reconstruction algorithms. Although its algorithm is quite easily understood, the variants of the implementation architectures and specifics are significant and are a large time sink for hardware engineers today.
The FFT v5.0 provides four different FFT architectures along with system level fixed point C-models, and reduces typical implementation time from between 3-6 months to the push of a button. It also provides users with the ability to make all the necessary algorithmic and implementation specific trade-offs demanded by both DSP algorithm and hardware engineers. These easily made trade-offs give users the ability to select the most resource and power efficient solutions for the specific point size and transform time needed for their application.
FFT v5.0 expands the focus on OFDM systems providing reduced area for OFDM multi-channel systems (like MIMO and mulit-sector processing) through increased coverage of the multi-channel architecture and also cyclic-prefix insertion. A typical FFT used in a 2x2 three sector BTS has been reduced in logic resources by 42% and 54% in memory usage when comparing v5.0 to v4.1
New Features in v5.0
- A fixed point bit-accurate C-Model to enable system level analysis of Xilinx FFT core.
- Programmable Cyclic Prefix Insertion for OFDM systems in order to significantly reduce memory and area utilized.
- Reduced Memory utilization on natural order output for Streaming FFT
- Multi-Channel Support for Radix-2 Burst architecture reduces logic area by 42% for 6 channel implementation compared to multiple FFT implementations
- Instant Latency feedback in the GUI for immediate analysis of FFT latency enabling trade-offs in implementation options vs. latency
- Forward and Inverse transform control for multi-channel FFTs enabling OFDM modulators and demodulators to share the same FFT structure saving resources.
Key Features
- Performance reaching up to the 450 MHz maximum performance of Virtex-5 (-1) Solutions
- Performance reaching up to the 250 MHz maximum performance of Spartan-3A DSP (-4) Solutions
- Transform sizes from 8 to 65536 points with the option to be run-time programmable
- Four architectural implementation options providing the most area efficient implementation for a given data rate
- A fixed point bit-accurate C-Model to enable system level analysis of Xilinx FFT core.
- Algorithmic trade-offs: bit widths, type of scaling and rounding, enable a resource efficient implementation given the algorithmic constraints
- Implementation trade-offs: Type of memory, and DSP48 usage, enable users to achieve the correct balance of resources used and performance
- Run-time configurable forward or inverse operation and scaling schedule for scaled fixed point
- Efficient multi-channel implementations significantly save resources over multiple FFT implementations
- Programmable Cyclic Prefix Insertion for OFDM systems to in order to significantly reduce memory and area utilized.
- Instantaneous Latency and Resource Estimation of DSP48/MULT18x18 and BRAM allows rapid comparison between key trade-offs
