Memory Interface Generator (MIG)

Part Number:

MIG

Product Type:

Core

Xilinx provides the Memory Interface Generator (MIG) software tool to create external memory controllers and interfaces

Product Details

Documentation

Device Family Support

  • Spartan-3A
  • Spartan-3A DSP
  • Spartan-3AN
  • Spartan-3E
  • Spartan-3
  • Virtex-4 FX
  • Virtex-4 LX
  • Virtex-4 SX
  • Virtex-5 FXT
  • Virtex-5 LX
  • Virtex-5 LXT
  • Virtex-5 SXT

Requirements

  • ISE software 10.1.1

 

 

MIG 2.2 is available via ISE® 10.1 IP Update 10.1.1

Memory Interface Generator (MIG) is a free software tool used to generate memory controllers and interfaces for Xilinx® FPGAs. MIG generates unencrypted Verilog or VHDL design files, UCF constraints, simulation files and implementation script files to simplify the design process. Memory Interfaces supported are: DDR2 SDRAM, DDR SDRAM, QDRII SRAM, and DDRII SRAM, and RLDRAM II.

Key Features

  • MIG generates through a Graphic User Interface the unencrypted Verilog or VHDL design files, UCF constraints, and simulation script files to simplify the memory interface design process.
  • Memory modules (DIMM) are supported for DDR2 and DDR SDRAMs.
  • OS Support
    • 64-bit/32-bit Linux Red hat Enterprise 4.0
    • 64-bit XP Professional
    • 32-bit Vista business
    • 64-bit SUSE 10
    • Windows XP

 

 

 
 
 
 
 
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