OPB Arbiter
Bundled With:
EDK
Product Type:
Core
Program:
LogiCORE
Documentation
Device Family Support
- Virtex-4 SX
- Virtex-II Pro
- Virtex-II
- Virtex-E
- Virtex
- Spartan-3
- Spartan-IIE
- Virtex-4 FX
The On-Chip Peripheral Arbiter soft IP core is designed for Xilinx FPGAs. It includes features such as an optional OPB slave interface, OPB arbitration, and a watch-dog timer. This core allows you to tailor the OPB Arbiter to customize their application by setting certain parameters to enable/disable features. The core incorporates the features described in the 32-bit implementation of the IBM On-Chip Peripheral Bus Arbiter Core User's Manual, version 1.5. This IP core is one of more than 20 IP cores that are part of the Embedded Development Kit.
Key Features
- OPB Arbitration - between 1-16 OPB masters, priorities between among masters, and so on
- Parameterizable to suit customer application
- OPB Slave interface