OPB Bus Structure
Bundled With:
EDK
Product Type:
Core
Program:
LogiCORE
Documentation
Device Family Support
- Virtex-4 LX
- Virtex-4 SX
- Virtex-II Pro
- Virtex-II
- Virtex-E
- Virtex
- Spartan-3A
- Spartan-3E
- Spartan-3
- Spartan-IIE
- Virtex-4 FX
The OPB Bus Structure is used as the OPB interconnect for Xilinx FPGA based embedded processor systems. The bus interconnect in the OPB v2.0 specification is essentially a distributed multiplexer implemented as an "AND" function in the master or slave driving the bus and an "OR" to combine the drivers into a single bus. This IP core is one of more than 20 IP cores that are part of the Embedded Development Kit. To view purchase information for the EDK, click the Purchase button.
Key Features
- One of the infrastructure cores available in the Embedded Development Kit (EDK)