OPB SDRAM Controller
Bundled With:
EDK
Product Type:
Core
Program:
LogiCORE
Documentation
Device Family Support
- Virtex-4 LX
- Virtex-4 SX
- Virtex-II Pro
- Virtex-II
- Virtex-E
- Virtex
- Spartan-3A
- Spartan-3
- Spartan-II
- Virtex-4 FX
The Xilinx OPB SDRAM controller provides a SDRAM controller which connects to the OPB bus and provides the control interface for SDRAMs. This IP core is one of more than 20 IP cores that are part of the Embedded Development Kit.
Key Features
- One of the memory cores available in the Embedded Development Kit (EDK)
- Performs device initialization sequence upon power-up and reset conditions
- Performs auto-refresh cycles
- Supports single-beat and burst transactions
- Supports cacheline latencies of 2 or 3 set by a design parameter Supports various SDRAM data widths set by a design parameter