OPB SPI Master and Slave Bus Controller
Bundled With:
EDK
Product Type:
Core
Program:
LogiCORE
Documentation
Device Family Support
- Virtex-4 LX
- Virtex-4 SX
- Virtex-II Pro
- Virtex-II
- Virtex-E
- Virtex
- Spartan-3A
- Spartan-3
- Spartan-IIE
- Virtex-4 FX
The Serial Peripheral Interface (SPI) is a full-duplex, synchronous channel that supports a four-wire interface (receive, transmit, clock and slave select) between one master and one slave. This IP core is one of more than 20 IP cores that are part of the Embedded Development Kit.
Key Features
- One of the cores available in the Embedded Development Kit (EDK)
- Four signal interface (MOSI, MISO, SCK, and SS)-- SS bit for each slave on the SPI bus
- Three signal in/out (in, out, 3-state) for implementing 3-state SPI device in/outs to support multi-master configuration within the FPGA